Has any one tried using an LSM9DS1 or ADXL345, Im working on a cy8ckit-059. I found a project on element 14 that uses an accelerometer but it is for the psoc 4. How difficult would it be to transfer boards? The goal is to display the data on a hyper-terminal and control some leds. Any information would help a lot I am a novice with the Psoc.
I am trying out example 3 from the application note "Getting started with DMA" (AN52705). It says that the frequency of my output should be the clock speed triggering my DMA divided by the number of entries in my LUT. My LUT has 128 entries and the output wave frequency responds as expected until it reaches about 15KHz. At that point no matter what the frequency of the output wave remains at about 15-16KHz.
Any idea why this might not be working?
Hello i am trying to run a PWM module with a 48 Mhz clock frequency.
I am using the IMO; and i set the clock at 48 Mhz. This is not working, and i can only measure 3 Mhz with my oscilloscope.
As the IMO is 3 Mhz, i figure that i need to do something else to get the 48 Mhz, described in this document:
http://www.cypress.com/file/140916/download
How can i get the 48 Mhz from the clock?
My project is attached. The clock i want to be 48 Mhz is the Clock_PWM.
Hope someone can help.
If I use the Address check option available in the UART, the document says it transfers the FIFO.
Does this mean
1. Only the the 3 bytes left in the Hardware FIFO (one byte of address) is transferred? or
2. The rest of the message till data stops is transferred?
Thanks.
GR
We have a PSoC5 MCU with USBUART (CDC) enabled.
Tested that PSoC can talk to PC and vice versa. We have a process on the PC that listens on its USB port and can receive everything the PSoC sends. Problem is, the PSoC doesn't always get data from the PC. We had to send multiple times and one of those times, it would get it.
In our main.c, we start and init USBUART. The code basically has 2 functions: poll for data from PC and do something else. In the PC polling function, we have
if (0u != USBUART_DataIsReady()){
// process data
}
I assume when the PC sends the data, the USBUART_DataIsReady() API should return true, but in this case, not all the time.
Hello every one, I have a problem about connecte micro Sdcard. I use FS_Init() then:
Firstly, I use funtion : FS_GetVolumeName(0u, &sdVolName[0], 9u), I have name Sdcard is "mmc".
Secondely. I use funtion: FS_Mount("mmc") , I have value -1 (Erro, Volume can not be mounted)
Please Tell me why? I dont read or write any file to/ from micro sd.
Thank so much!
Hello,
this is my first posting here and third day with PSOC Creator, so thank you in advance for being forgiving if the questions are trivial.
I want to build an 8-bit output-only parallel port which takes a byte from memory using DMA and sends it to a peripheral port. In the attachment there is my current state of affairs. I would like to ask the following.
1. Power_Data_Output is the intended destination for the DMA transfers. Currently I attached it to a constant, but how exactly should I tell Creator that it will be driven by DMA, so it should stay unconnected? If I just do tht, the compiler says "No input on Instance "Power_Data_Output", terminal "y_7[7:0]".
2. I want to be sure that the Power_SHCP strobe pin is driven sufficiently past the actual Power_Data_Output setup in order to avoid race conditions and I also want to extend it in time to a single 4MHz clock pulse (BUS_CLK is 64MHz). Is the solution with the RS flip-flop sound?
3. In a broader context it may be useful to pass the 8-bit data chunk through the UDB's datapath, which would imply sending the byte to the associated FIFO and generating all the strobes in the datapath program. But what then with the byte? Is there a way to latch it somehow in the datapath's output/the second FIFO and route directly to the peripheral port, without engaging another DMA and sparing the programmable logic macrocells for other purposes? My ambition is to do everything described here and on the diagram within a single UDB, just for the purpose of learning it.
4. How do I actually know how many UDBs have been consummed? The tool informs me about RAM usage etc., but I don't see anything about the UDBs.
Best regards
Hello,
I am currently working on a project in which there is a need to synchronize the clocks between the two physically separated PSoC 5LP boards. Desired frequency (that needs to be the same on both boards) is in range from 100kHz to about 150kHz, and the error should be as low as possible. Since the IMO tolerance is at best +-1%, on a clock of (for example) 120kHz it produces an uncertainty of +-1200Hz, which is a total of 2400Hz. Such error is not satisfying enough.
I am thinking of using an external 32kHz oscillator to trim the IMOs of both boards. Using 100ppm crystals, it should produce an error of about +-0.05%, which is considerably better. If I understand trimming correctly, there is not a great benefit of using a more precise crystal, since internal trim register limits the achievable accuracy to +-0.03%. Is it possible to get better results than that using another method?
How does the IMO trim API work - is it possible to "calibrate" the IMO using the 32kHz ECO at startup, or does the trimming need to continue during the time of operation?
I have been using the PSoC5 for some CNC motion control applications. I was using the CY8CKIT-059 and was having trouble with some pins not working for stepper motor step generation. When looking at the schematic I saw that P0_2, P0_3,P0_4, and P3_2 have 1.0uF capacitors. See the attached schematic snippet.
I think those capacitors are killing my short (a few usecs) step pulses. I will probably remove the caps. I was wondering how much capacitance the I/O can handle before it is damaged. I could not find the spec in the datasheet.
BTW: If you are interested in CNC motion control on PSoC see my blog post.
http://www.buildlog.net/blog/2017/02/psoc-5-port-of-the-grbl-1-1-cnc-con...
Is it possible to program the CY8CKIT-010 family module directly, when it is not on the CY8CKIT-001 board? Looking at the schematic it seems that with power supplied by the programmer (MiniProg3) this should work, but I haven't had any luck,
Thanks in advance for your help.
Hello, All! I am new in PSoC world. Currently I am working on a project that require accurate frequency measurement. Since PSOC5 internal clock doesn’t accurate, using external crystal oscillator will provide more accurate measurement.
I have an external crystal with part number ECS-240-20-33-CKM-TR, which is 24 Mhz crystal and 20 pF load capacitance. I already soldered this crystal on the PCB board next to PSOC chip at Pin 15[0] and Pin 15[1](I have attached schematic). I choose two 22 pF capacitors as load.
I followed procedure (AN54439_External crystal oscillators) and tried to enable this external crystal oscillator in PSOC creator, but it never work. (See attached setup).
I don’t know why that it doesn’t work. Thank you for any help, I will really appreciate.
Hello,
does anyone know how to clear the input buffer of the usbuart in cdc mode?
Thanks, Christian
Now things get really interesting! I have a datapath-based component (you helped me to develop it in the Parallel port thread). Its function is as follows: idle a trigger arrives (51kHz if that matters). Then issue 9 consecutive DMA transfers on the same channel to an 8-bit GPIO port, generating externally visible strobes after each transfer. and sampling the status of an external 1-bit input (through the carry chain), collects the last 8 results and store the final 8 bits into an output FIFO. The datapath FSM manages all that. This, together with a Count7-based fixed duty cycle two channel (with deadbanding) 500kHz PWM generator fits within a single UDB.
The question is about triggering. The trigger signal pulse will have unknown duration (now 50% @ f=1/51kHz, which is long in terms of the 64MHz datapath clock), but synchronized, so a resettable edge detector is required. It can be easily written in Verilog, but it would eat up one PLD macrocell. So I've invented the following: since one FIFO is unused, it could be configured to internal dynamic mode (d1_load=0). Then its write strobe (f1_load) is connected to the trigger signal, the write data source could be anything except of CPU/DMA, according to the manual (now: A1) and f1_bus_stat indicates whether the FIFO is not empty. Then the system starts with f1_bus_stat high (empty FIFO), the trigger causes it to load something into the FIFO (the fetched value has no meaning), f1_bus_stat gets low and datapath starts its job. In the final state D1 is loaded from the FIFO, which makes it empty again. The result is a resettable edge detector based on the FIFO; moreover, it can buffer up to 4 trigger signals should they arrive before the datapath's job completion (cannot happen here, but still a potentially useful feature).
The scope confirms it works like a charm, but since it abuses the FIFO so much beyond its designed purpose, there is a question whether the whole approach is legal in terms of the specification.
Hi,
We have a design using a CY8C5868AXI-LP035 PSoC 5 which we use for development and has been programmed on many occasions using a Miniprog3 from either PSoC Creator V3.3 or PSoC Programmer 3.24.2.
However, just from today, whenever we try to program the device it gets wrongly identified by both applications with the message "The selected debug target 'CY8C5667LTI-LP041' is not compatible with the project's selected device 'CY8C5868AXI-LP035'". It seems to think k that it is a 5667 device which it definitely isn't.
I have tried two different MiniProg3 programmers (one new out of the box) and both give the same result. I can't simply recompile for the "other" device as it is a completely different package (68pin vs 100pin).
Had anybody come across this problem before? The PSoC is currently rinning the firmware altready loaded without a problem but I need to resolve the issue to update it.
Many thanks
Hello There!
I am trying to make a data transfer between my a delta sigma ADC and a Filter. I can do this perfectly by doing it with the CPU, however i want to do it with DMA.
I have tried using the wizard and looked at different examples. I can get it to work using 8-bit values, but want it done for 16-bit components.
Right now the code in the project is (I've tried a lot, and changed a lot. Right now the code is from an example):
/* Defines for DMA */
#define REQUEST_PER_BURST (1u)
#define BYTES_PER_BURST (3u)
#define UPPER_SRC_ADDRESS CYDEV_PERIPH_BASE
#define UPPER_DEST_ADDRESS CYDEV_PERIPH_BASE
/* Declare variable to hold the handle for DMA channel */
uint8 channelHandle;
/* Declare DMA Transaction Descriptor for memory transfer into
* Filter Channel. */
uint8 tdChanA;
/* Configure the DMA to Transfer the data in 1 burst with individual trigger
* for each burst.*/
channelHandle = DMA_DmaInitialize(BYTES_PER_BURST, REQUEST_PER_BURST,
HI16(UPPER_SRC_ADDRESS), HI16(UPPER_DEST_ADDRESS));
/* This function allocates a TD for use with an initialized DMA channel */
tdChanA = CyDmaTdAllocate();
/* Source and Destination address increments are needed as we are using 3 byte transfers
but Spoke Width is 16 bit */
CyDmaTdSetConfiguration(tdChanA, 3u, tdChanA, TD_INC_SRC_ADR | TD_INC_DST_ADR);
/* Set the source address as ADC_DelSig and the destination as
* Filter Channel A.*/
CyDmaTdSetAddress(tdChanA, LO16((uint32)ADC_DEC_SAMP_16B_PTR), LO16((uint32)RIAA_STAGEA_PTR));
/* Set tdChanA to be the initial TD associated with channelHandle */
CyDmaChSetInitialTd(channelHandle, tdChanA);
/* Enable the DMA channel represented by channelHandle and preserve the TD */
CyDmaChEnable(channelHandle, 1u);
Can anyone help me get it to work, or just give me a hint at where i am doing wrong.
Project is atrtached.
Hi,
We have an electronics apprentice and we are looking for a couple of interesting PSoC 5 applications to get his interest. I came across a Cypress Video for the their quadcopter demo and have been trying to get more of the design files to allow us to give this to our apprentice as a project. There is a Bill Of Materials published for components for the main PCB but, as far as I could see, there are no PCB or other design files or information about any of the other parts.
We have a 3D printer as well so could potentially produce all of the custom parts if we could get more information.
Can anybody point me in the direction of a link or person who could help?
Many thanks.
Hello,
I have a working project with a datapath and two FIFOs. F0 is dynamic and, pretty surprisingly, this advanced mode is clear to me. F1, on the other hand, was configured as static output (F1_INSEL = A1 in the Datapath Configuration Tool). The intended purpose is that the datapath should deposit the value from A1 in a specified state and this value should be transferred to the CPU. Both FIFOs are configured as edge-triggered (FIFO_EDGE = EDGE). And so it works. BUT:
1. If I don't connect the .f1_load port of the datapath and leave it with its default value, the DMA is not started, which implies that the write request was ignored. But what's the purpose of F1 in A1 WR SRC in the last state (see the attached picture), if, in fact, I can fetch the accumulator value in any state?
2. If I connect .f1_load as .f1_load(f1_load_strobe), where
wire f1_load_strobe = (state == STATE_STORE_INPUT);
the value of A1 is transferred via the DMA to a byte in memory. All the necessary DMA control signals are there, as my scope confirms. But then why I can at all select F0/F1 in the WR section, if it's controlled by an external strobe, anyway?
Could someone please explain me what's the meaning of the Ax WR SRC fields when configured as F1 or F0? Is it possible to simply write a byte into a FIFO from the datapath and let the insertion magically happen, without any strobes?
I have never made a custom component but find the need to bootload a PSoC5LP over a custom communication interface on our product. Does anyone know of an example that I could use rather than start from scratch and read a lot of the Custom Component Guide?
Mike.
Hello,
it seems I have a serious issue with synthesis of the same datapath component. I've cleared all the unecessary confuguration data from the Datapath Configuration Tool. What it should do:
BUS_CLK (64MHz) drives a Count7 instance. The thre least significant lines are fed to the datapath as its instruction address selector. The first instruction is ADD A0, 1 => A0, the second is SUB A1, A1, carry => A1. Since A0 is incremented every 8th instruction (effectively 8MHz) and carry is set every 256th iteration it should result in a waveform of 31,25kHz. The A1-based instruction tests carry propagation, so A1 should be 0xff when ci from the previous instruction is 1 and 0x00 otherwise. This is monitored on the ff1 port.
Exactly this happens in the case of the simple testcase (see the attached scope dumps).
But if the component is a part of a much bigger solution (the bottom left corner of Page 'Mains synchronizer'), the output is havoc.
Could you please check if there is no simple mistake in my project? Should I report Cypress a bug?
I want to measure the width of each pulse from an external signal. For this I set up a timer to run continuously,trigger at the rising edge and capture at the falling edge. There is an ISR attached to the interrupt terminal of the timer and is called Channel_1_ISR as can be seen below.
The ISR runs once since the led state is only toggled once but not after that. What am I missing?
CY_ISR(Channel_1_ISR_Handler){
Channel_1_Count=Channel_1_Timer_ReadCapture();
onboard_led_Write(~onboard_led_Read());
Channel_1_ISR_ClearPending();
}
int main(void)
{
CyGlobalIntEnable;
onboard_led_Write(~onboard_led_Read());
Channel_1_Timer_Start();
Channel_1_Timer_EnableTrigger();
Channel_1_ISR_Enable();
Channel_1_ISR_StartEx(Channel_1_ISR_Handler);
for(;;){}
}
